The present disclosure relates to a capacitor structure, and particularly to a precision trench capacitor structure with adjustable capacitance and a method of manufacturing the same.
Deep trench capacitors are used in a variety of semiconductor chips for high areal capacitance and low device leakage. Typically, a deep trench capacitor provides a capacitance in the range from 4 fF (femto-Farad) to 120 fF. A deep trench capacitor may be employed as a charge storage unit in a dynamic random access memory (DRAM), which may be provided as a stand-alone semiconductor chip, or may be embedded in a system-on-chip (SoC) semiconductor chip. A deep trench capacitor may also be employed in a variety of circuit applications such as a charge pump or a capacitive analog component in a radio-frequency (RF) circuit.
A plurality of deep trench capacitors can be connected in a parallel connection to provide a capacitor structure. The total capacitance of such a capacitor structure is the sum of all individual capacitance of the individual deep trench capacitors. Because the depth and the width of the trenches of the individual deep trench capacitors vary within each substrate and from substrate to substrate due to process variations, the total capacitance of a capacitor structure formed by a parallel connection of individual deep trench capacitors also varies within each substrate and from substrate to substrate.
Performance of a circuit including a capacitor structure containing a plurality of deep trench capacitors is adversely affected by the variations in the capacitance of the capacitor structure. This is especially so in a circuit requiring a high Q-factor such as a ring oscillator. Thus, there is a need to provide a capacitor structure having a high precision capacitance.